Samsung lifts HBM yield as US tariffs loom over China-made chips

South Korean media have reported that Samsung Electronics has made notable progress in developing next-generation high-bandwidth memory (HBM). According to Chosun Biz, the company recently surpassed a test production yield of 40% for the logic die, produced using Samsung’s 4nm foundry process, a marked improvement over Baidu’s 15-19% yield for chips manufactured using the same technology.

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Hon Hai Research Institute invests in ultra-wide bandgap semiconductor development

The Semiconductor Research Center at the Hon Hai Research Institute (HHRI), together with National Yang Ming Chiao Tung University (NYMCTU) in Taiwan and the University of Texas at Austin in the US have invested in forward-looking research on beta-gallium oxide (β-Ga2O3) ultra-wide bandgap (UWBG) semiconductors, which has led to significant breakthroughs in the satellite communications and high-power component sectors.

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Cadence to acquire Arm’s Artisan foundation IP business

According to the official press release, Cadence has announced a definitive agreement to acquire Arm’s Artisan foundation IP business, expanding its design IP portfolio and entering the foundation IP market for the first time. The deal includes standard cell libraries, memory compilers, and general-purpose I/Os optimized for advanced nodes at leading foundries. It is expected to close in the third quarter of 2025, pending regulatory approvals and customary closing conditions.

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Tenstorrent aligns with Rapidus for 2nm chip validation, targets year-end tape-out

Tenstorrent, a US-based semiconductor design firm, held a press conference on April 17 at its newly established Tokyo office to discuss its deepening collaboration with Rapidus in advancing 2nm semiconductor technology. During the event, the company also revealed plans to significantly expand its presence in Japan, aiming to increase its number of design engineers sixfold by the end of 2025.

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Samsung faces delays in 1c DRAM development, raising concerns over HBM4 timeline

Samsung Electronics is encountering delays in the development of its next-generation 1c DRAM chips, according to sources familiar with the matter. Originally slated for sample testing in July 2025, the schedule has reportedly been pushed back to October due to complications in the redesign process. Insiders say the situation remains fluid, with yield rates still uncertain, raising concerns that the timeline for mass-producing HBM4 chips, which rely on 1c DRAM, may also be affected.

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